The invention relates to semiconductor power device technology, and more particularly to structure and method of forming an improved trench-gate laterally-diffused FET.
Power MOSFET devices are widely used in numerous electronic apparatus, including automotive electronics, disk drives and power supplies. Generally, these apparatus function as switches and are used to connect a power supply to a load. One of the areas in which MOSFET devices are used is radio frequency (RF) applications. Such RF MOSFET devices are lateral transistors. Recent advances in lateral (or laterally-diffused) MOSFET (LDMOS) devices have improved their performance and cost characteristics when compared to vertical MOSFET devices for RF power amplifiers in base station applications.
High voltage LDMOS devices in accordance with the Reduced Surface Field (RESURF) principal provide an extended drain region that is used to support the high off-state voltage, while reducing the on-resistance. The low-doped, extended drain region operates as a drift region for transferring carriers when the device is in the “on” state. On the other hand, if the device is in the “off” state, the extended drain region becomes a depletion region to reduce the electric field applied thereon, resulting in an increase in breakdown voltage.
The drift resistance of the extended drain region, and thus the device on-resistance RDSon, may be further reduced by increasing the concentration of impurities in the low-doped drain region. Moreover, additional layers in the extended drift region help deplete the drift region when the drift region is supporting a high voltage. These additional alternating conductivity type layers are called charge balancing or field-shaping layers and have led to development of super-junction structures in a number of RESURF LDMOS technologies.
However, there is a trade-off between the on resistance and the breakdown voltage VBD because of the difficulty in extending the boundaries of the depletion layer with the higher charge density caused by the increased impurity concentration. Recently, multiple RESURF LDMOS devices using super junction structures have been proposed to lower the RDSon without decreasing VBD. However, these prior art LDMOS devices using super-junction structures suffer from a number of drawbacks. For example, proposed LDMOS devices having multiple p-type charge balancing layers in the silicon bulk region and a surface gate electrode suffer from high JFET resistance that increases RDSon due to the long current path from the surface gate to the charge balancing layers. Other proposed LDMOS devices with multiple p-type field shaping layers in the silicon bulk region use trenched gate electrodes where the current flows around the trench gate and through the inversion layers. However, the flow of current around the gate and through inversion layers results in a high inversion channel resistance that increases RDSon.
What is needed are structures and methods that provide an improved LDMOS according to the RESURF principal. In particular what is needed is a LDMOS device with reduced on-resistance that also allows careful control of charges in the extended drain region to maintain a high breakdown voltage VBD.